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Kort version - Fuld version
DSP implementation in Hardware (Forår 2004) |
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| Kursuskode : | EDSPHE-U01 | ||
| ECTS Point : | 7,5 | Status : | Tilvalg for den valgte retning |
| Revideret : | 27/01 2004 | Oprettet : | 19/01 2004 |
| Placering : | 5-7 semester | Timer pr. uge : | 4 |
| Længde : | 1 semester | Undervisningssprog : | Dansk hvis der ikke er engelsksprogede studerende tilstede |
| Målsætning : | ·To analyze the demand for hardware for solving a DSP problem in hardware. ·To analyze and partition a problem between a hardware and/or software implementation ·To do a structural design in VHDL or other programming language for a FIR, IIR filter. ·To consider how precise the design will work when implemented. ·You should be able to implement and test a part of a solution for some parts of DSP algorithms in a hardware systems for instance FPGA’s or in DSP processors. |
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| Hovedindhold : | ·Embedded DSP systems solutions – hardware / software partitioning possibilities, constraints and cost optimization. ·Possibilities and constraints for implementation DSP algorithms in FPGA or PLD architectures. ·Filter algorithms in VHDL for implementation in hardware. ·Fix point algorithms for multiplication, division and subtracting in VHDL. ·Analog digital analog converting methods – resolutions the best choice? ·Test methods for a DSP design in a hardware. |
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| Undervisningsform : | Overview lectures with lab exercises and module assignments | ||
| Krævede forudsætninger : | Documented knowledge similar to DSM3/DSM4 and DIG1A, DEL3 and VHDLE | ||
| Anbefalede forudsætninger : | Analog filters, digital to analog and analog to digital conversionDSP processors | ||
| Relationer : | - | ||
| Prøveform : | Mundtlig evaluering på grundlag af kursusopgaver | ||
| Censur : | Intern | ||
| Bedømmelse : | 13-skala | ||
| Bemærkninger : | At the examination each student is allocated 10 minutes.The examination is a group examination but the marking is individual.The evaluation is based on a general impression of the level achieved by the student relative to the objective of the course. The evaluation is based on the report, the oral performance and the functionality of the module assignment.The group presents the project by giving well-prepared presentations.The duration of the presentation is approx. 5 minutesThe group is required to coordinate the presentations in such a way that the major aspects of the assignment are covered, that the presentations are different and that each individual presentation has a good technical span.After the presentation the supervisors and the external examiner pose questions inspired by the presentations and the report. The questions are a priori individual but may - if found relevant by the supervisors or the external examiner - form the basis of a broader group discussion.During the evaluation by the supervisors and the external examiner, the group leaves the room. Afterwards the group is summoned and the individual marks are explained.If the student doesn"t pass the examination, the student is given guidance on how to improve the chances of passing.After participating in this course you should be able to analyze a given DSP problem covering audio, RF and image. You should be able to implement and test a part of a solution for some parts of DSP algorithms in a hardware systems for instance FPGA’s or in DSP processors.The course is relevant if you want to work with digital electronics used within products covering network/Radio Frequencies/image/audio in the industry. The module assignments must be approved before the exam | ||
| Undervisningsmateriale : | Notes | ||
| Ansvarlig underviser : | Henrik Kent Palle
, hkp@ihk.dk |
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