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DSP implementation in Hardware (Forår 2004)

Kursuskode : EDSPHE-U01
ECTS Point : 7,5 Status : Tilvalg for den valgte retning
Placering : 5-7 semester Timer pr. uge : 4
Længde : 1 semester Undervisningssprog : Dansk hvis der ikke er engelsksprogede studerende tilstede

Hovedindhold : ·Embedded DSP systems solutions – hardware / software partitioning possibilities, constraints and cost optimization.
·Possibilities and constraints for implementation DSP algorithms in FPGA or PLD architectures.
·Filter algorithms in VHDL for implementation in hardware.
·Fix point algorithms for multiplication, division and subtracting in VHDL.
·Analog digital analog converting methods – resolutions the best choice?
·Test methods for a DSP design in a hardware.
Undervisningsform : Overview lectures with lab exercises and module assignments
Krævede forudsætninger : Documented knowledge similar to DSM3/DSM4 and DIG1A, DEL3 and VHDLE
Ansvarlig underviser : Henrik Kent Palle , hkp@ihk.dk