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DSP implementation in Hardware (Spring 2004) |
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| Course code : | EDSPHE-U01 | ||
| ECTS Credits : | 7,5 | Status : | Optional for specified Programme |
| Placement : | 5-7 semester | Hours per week : | 4 |
| Length : | 1 semester | Teaching Language : | Danish if no English students are present |
| Principal Content : | ·Embedded DSP systems solutions – hardware / software partitioning possibilities, constraints and cost optimization. ·Possibilities and constraints for implementation DSP algorithms in FPGA or PLD architectures. ·Filter algorithms in VHDL for implementation in hardware. ·Fix point algorithms for multiplication, division and subtracting in VHDL. ·Analog digital analog converting methods – resolutions the best choice? ·Test methods for a DSP design in a hardware. |
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| Teaching method : | Overview lectures with lab exercises and module assignments | ||
| Required prequisites : | Documented knowledge similar to DSM3/DSM4 and DIG1A, DEL3 and VHDLE | ||
| Responsible teacher : | Henrik Kent Palle
, hkp@ihk.dk |
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