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Digital design (Spring 2006) |
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| Course code : | IDIG1A-U01 | ||
| ECTS Credits : | 10 | Status : | Compulsory |
| Revised : | 31/01 2006 | Written : | 19/12 2005 |
| Placement : | 1. semester | Hours per week : | 8 |
| Length : | 1 semester | Teaching Language : | Danish |
| Objective : | Be able to describe, design and test as well as implement combinational and synchronous sequential digital circuits using truth tables and state diagrams. Be able to use the development software tool for synthesis and test. | ||
| Principal Content : | Binary and hexadecimal number systems, Boolean algebra, truth tables, combinational circuits, flip-flops, sequential circuits including counters and state machines. Programmable logic devices (PLD). VHDL-program structure for combinational and sequential digital circuits including state machines Structural design using block diagrams and/or structural VHDL description. Test combinational and sequential digital circuits using test benches. | ||
| Teaching method : | The teaching is a combination of class teaching and exercises. The teaching is based on a number of assignments which are carried out in groups. | ||
| Required prequisites : | - | ||
| Recommended prerequisites : | - | ||
| Relations : | - | ||
| Type of examination : | Oral examination based on assignments | ||
| External examiner : | Internal | ||
| Marking : | Scale of 13 | ||
| Remarks : | Some assignment exercises is done during the semester. In order to sit for the examination the reports must be approved by the teacher. In the beginning of the semester the students form their own project groups. The group size should be 3-5 students. Before the exam: Group presentation of the project. Each student will give a 5 minutes presentation of a part of the project. These presentations must be different and together they must cover important topics of the project. Oral exam: The exam is individual, and allow 10 minutes pr. student. The assessment is based on a general impression of the student with respect to the goals of the course. This will be evaluated from the project report, the oral performance as well as the functionality of the project. During the exam supervisor and censor will ask questions inspired by the presentation and the project report. After the exam: If the student doesn’t pass the examination, the student is given guidance on how to improve the chances of passing. XILINX WebPack is used as a tool for designing digital electronics. |
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| Teaching material : | Digital Electronics, dig1a and dig2a. Pearson. Prentice Hall. | ||
| Responsible teacher : | Bent P. Meincke
, bme@ihk.dk |
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